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CPLD and FPGA Architectures and Applications (18PE5704)

COURSE: M.TECH(VLSID)                                                BRANCH:  ECE

YEAR & SEM:   I-I                                                                 REGULATION: R18

UNIT-1

PART-I
1. (a). Implement a BCD to Excess-3 code converter by ROM. Calculate the cross point density of the
implementation?
(b). Draw the structure of PAL and explain it.
2. Explain about PROM and implement f 1 = (0,1,2,3,4,6,8) and f 2 = (0,2,3,4,5)
3. (a) Implement a full subtractor using PLA
(b) Draw the structure of PLA and explain it.
4. (a) Distinguish between programmable logic devices.
(b)Implement the following Boolean function using PAL F(w, x, y, z) = Σm (0, 2, 4, 6, 8, 10, 11, 12, 14, 15)
5. Compare PLA, PAL and PLDs with respect to different features, programming and Applications.
PART-II
6. (a). Explain the various architectures ALTERA CPLD’s.
(b). Distinguish between FPGA and CPLD
7. With neat block diagram, explain the architecture of Xilinx Cool Runner XCR3064XL CPLD?
8. (a) Compare the salient features of AMD’s CPLD Mach 1 to 5.
(b) Briefly explain about CPLD Implementation of a Parallel Adder with Accumulation.
9. When is CPLD better suited than SPLD? List out the comparisons between those two.
10. (a).Explain few differences between programmable logic device and Complex programmable logic devices?
(b). Draw the logic diagram of MAX 7000 CPLD microcell and explain its functioning.

UNIT-2

PART-I
1. Explain different programming technologies in FPGA.
2. (a) Explain in detail about FPGA based system design
(b) What are the various methodologies of FPGA? Explain the same with neat diagram.
3. Explain the design flow of FPGAs.
4. Write about Organization of FPGAs in detail.
5. Discuss about Programmable Interconnects in FPGAs.
PART-II

6. (a). Give the Xilinx XC 4000 features and compare them with altera’s flex 8000 series FPGA.
(b). Draw the design flow of field programmable gate arrays and discuss about its routing architecture.
7. (a) Draw and explain logic blocks of FPGAs.
(b) Explain technology mapping for FPGA’s?
8. a) Explain the concept of Programmable I/O blocks in FPGAs?
b) Briefly discuss about the applications of FPGA?
9. Write about dedicated specialized components of FPGAs.
10.(a) Explain about applications of FPGAs.
(b) Explain about ACTEL FPGA’s architectures?

UNIT-3

PART-I
1. (a ).Write about SRAM Programming technology of programmable FPGAs with neat sketches.
( b). List out the salient features of Xilinx 3000 CLB.
2. (a) What is a Trade-off? Discuss about the different design Trade-offs?
(b) Draw the design flow of field programmable gate arrays and discuss about its routing architecture.
3. (a) How would you implement a binary counter using the CLBs of FPGA?
(b) Describe applications of Actel FPGAs.
4. Draw the structure of SRAM controlled programmable switches and explain its function.
5. Explain in detail about Programming Technology?
PART-II
6. Draw the schematic diagram of Xilinx based XC 4000 CLB and describe its functional operation.
7. Give the Xilinx XC 4000 applications, features and compare them with altera’s flex 8000 series FPGA.
8. Explain about XC4000 AND ALTERA.s FLEX 8000.
9. (a) Tabulate the comparisons of different XC3000 family members?
(b) Draw and explain the CLB and IO Blocks of Xilinx XC4000 architecture?
10. (a) Explain about device architecture of XC3000.
(b) Draw and explain the CLB and IO Blocks of Xilinx XC2000 architecture?

UNIT-4

PART-I
1. (a) Draw the architectures of ACTEL based FPGAs and compare their performance.
b) Explain the ACT2 architecture for high fan-in example?
2. Explain about anti fuse programming technologies?
3. Explain about ACTEL FPGA Architecture and its Characteristics?
4. Draw the architectures of ACTEL based FPGAs and compare their performance.
PART-II
5. (a) How the ACT3 architecture is different from ACT2 architecture? Explain the ACT3 architecture in detail?
(b) Explain its application?
6. (a) Write about FPGA and compare the speed performance of ACT1,ACT2,ACT3 FPGA.
(b) Draw the explain the architecture of optimized reconfigurable cell array of AT&T.
7. (a) Compare the performance parameters of ACTEL based FPGAs ACT-1,2 and 3.
(b) Compare the speed performance of ACT 1,2,3.
8. (a) Draw the architecture of Altera flex 8000 FPGAs and Explain it.
( b) Design a five bit binary counter with ACT devices?

UNIT -5

PART-I
1. (a). Explain about different programmable elements in FPGA architectures.
(b) Realize full subtractor using Actel FPGAs
2. (a). Explain about a fast video controller.
(b). Explain about a fast DMA Controller in detail.
3. Design a five bit binary counter with ACT devices?
4. What are the general design issues of FPGAs in design applications and explain in detail?
PART-II
5. (a) Explain about position tracker of a Robot manipulator with help of FPGAs.
(b) Realize full adder using Actel FPGAs.
6. Write about Designing Adders and Accumulators with the ACT Architecture in detail.
7. Designing Adders and Accumulators with the ACT Architecture.
8. Explain about a Fast DMA Controller?